1. Field of the Invention
The present invention relates to a high-speed/high-precision analog/digital converter having low power consumption.
2. Description of the Related Art
Conventional low power-consumption analog/digital converters, for converting analog signals into digital signals, are taught in, for example, "An 8 MHz 8b CMOS Subranging ADC", Andrew G. F. Dingwall, ISSCC 1985, Digest of Technical Papers, pp. 72-73, and in "Analysis and evaluation of CMOS chopper-type comparator", Kuboki et al., Journal of the Institute of Electronics and Communication Engineers of Japan, 84/5 Vol. J67-C No. 5, pp. 443-450.
FIG. 1 is a circuit diagram showing an arrangement of the CMOS chopper-type comparator disclosed in the former of the above two papers. A reference voltage Vref obtained by a resistor ladder circuit is supplied to one terminal of a capacitor 152 through a CMOS transfer gate 151. When the CMOS transfer gate 151 is kept enabled, the input and output terminals of a CMOS inverter 153, the input terminal of which is connected to the other terminal of the capacitor 152, are short-circuited through a CMOS transfer gate 154, and an operation point of the CMOS inverter 153 is determined. Then, a CMOS transfer gate 155 is enabled, and an analog input voltage Vin is supplied to one terminal of the capacitor 152. At this time, the CMOS transfer gate 154 is disabled, and an output from the CMOS inverter 153 is determined on the basis of a comparison result between the reference voltage Vref and the analog input voltage Vin. Thereafter, the output from the CMOS inverter 153 is latched by a CMOS latch circuit 156, in synchronism with a clock signal .phi.. The number of CMOS chopper-type comparators is the same as that of the reference voltages obtained by the resistor ladder circuit.
However, even if an optimum circuit constant is set, in the case of the CMOS chopper-type comparator having the above arrangement, as disclosed in the former paper, the operation speed of the device is nevertheless limited. When the number of reference voltages Vref compared with the input voltage Vin is increased and bit precision is improved, the operation speed of the device is limited much more. For this reason, the conventional low power-consumption CMOS analog/digital converter is not suitable for performing digital conversion of a high-frequency analog signal such as a video signal, because a very low input voltage cannot be amplified to a CMOS level without an offset error. Therefore, although low power consumption can be realized in the conventional analog/digital converter having the CMOS arrangement, a very low analog input voltage having a high frequency cannot be digitally converted with high precision.